|
 |
|
|
|
 |
|
 |
|
3D package solutions such as MCM and Stacked CSP are currently well known
as 3D LSI technology and are practically utilized. Due to several kinds of
restrictions, however, these current 3D package solutions will soon have serious limitations against LSI market needs of the higher speed, more capacity, more flexibility,
and
less cost.
ZyCube invented its proprietary (patented) Wafer through-hole technology
and utilized Wafer-on-Wafer layering process included the Chip-on-Wafer
and Chip-on-Chip stacking technology. The ZyCube technology is completely
different from the current 3D package technologies and is acclaimed as
a break-through technology.
|
|
|
|
 |
|
|
|
 |
|
|
|
The current 3D LSI technology accumulates several LSI dies as the Pyramids
and wire-bonds each pad on each die to the package substrate. Thus, for
example, the higher layer must be smaller and the wire from the higher layer gets longer.
Such disadvantages impact on LSI design difficulty, speed, capacity and
flexibility. The current 3D LSI technology will soon fail to fulfill the
rapidly-growing demands of LSI market.
ZyCube originally invented Through-hole technology; just 1 um square. The
technology allows LSI manufacturers to, with no restriction; accumulate
any types of LSI die such as Processor, any kind of Memory, CMOS sensor,
Digital I/O, and Analog I/O and to connect between any layers. Furthermore,
since each die size is well optimized to maximize the yield and all Analog
circuits can be put together on a layer, ZyCube technology accomplishes
the higher yield, less cost and less noise.Thus, ZyCube technology is the
most ideal among the 3D LSI technologies@and only one which can always fulfill the rapidly-growing LSI market requirements.
|
|
|
|
 |
|
|
|
 |
|
|
|
ZyCube 3D LSI technology consists of the following five key-technologies: |
|
|
|
| (1) |
Wafer thinning |
|
The leading-edge technology to thin a wafer |
| (2) |
Wafer alignment |
|
The leading-edge technology to build up wafers at nano-micron level |
| (3) |
Adhesive
layer |
|
The leading-edge technology to precisely adhere wafers |
| (4) |
Buried interconnection |
|
The leading-edge technology to build a microscopic buried interconnection |
| (5) |
Micro
bump |
|
The leading-edge technology to build a microscopic electric pole |
|
|
|
|
 |
|
|
|
 |
|
|
|
ZyCube technology has already been put to practical use in several LSIs.The
example is a retina IC. The first layer is receptor cell layer to focus
light.The second layer is retina cell layer, and the third layer is pulse
modulator layer to convert to signals.ZyCube technology effectively builds up sensor, A/D (D/A), Control logic
and, so often,buffer memory in one chip. |
|
|
|
 |
|